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 STW20NC50
N-CHANNEL 500V - 0.22 - 18.4A TO-247 PowerMeshTMII MOSFET
TYPE STW20NC50
www..com s TYPICAL
s s s s
VDSS 500V
RDS(on) < 0.27
ID 18.4A
RDS(on) = 0.22 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED
2 1
3
DESCRIPTION The PowerMESHTMII is the evolution of the first generation of MESH OVERLAYTM. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness.
TO-247
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS SWITH MODE LOW POWER SUPPLIES (SMPS) s HIGH CURRENT, HIGH SPEED SWITCHING s DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVES
s
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (q) PTOT dv/dt(1) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature Value 500 500 30 18.4 11.6 73.6 220 1.75 2 -65 to 150 150
(1)ISD 18.4A, di/dt 100A/s, V DD V(BR)DSS, Tj TJMAX.
Unit V V V A A A W W/C V/ns C C
(*)Pulse width limited by safe operating area
May 2001
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THERMAL DATA
Rthj-case Rthj-amb Rthc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.57 30 0.1 300 C/W C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR
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Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V)
Max Value 20 960
Unit A mJ
EAS
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 30V Min. 500 1 50 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 9 A VDS > ID(on) x RDS(on)max, VGS = 10V Min. 2 Typ. 3 0.22 Max. 4 0.27 Unit V
18.4
A
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 9A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 18 2980 410 58 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs
www..com Qgd
Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Test Conditions VDD = 250V, ID = 10A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 20A, VGS = 10V
Min.
Typ. 29 21 95 14.7 41.7
Max.
Unit ns ns
128
nC nC nC
SWITCHING OFF
Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 400V, ID = 20A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 20 21 58 Max. Unit ns ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 18.4A, VGS = 0 ISD = 20A, di/dt = 100A/s, VDD = 100V, Tj = 150C (see test circuit, Figure 5) 480 5 21 Test Conditions Min. Typ. Max. 18.4 73.6 1.6 Unit A A V ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
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Output Characteristics Transfer Characteristics
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Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
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Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature
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Source-drain Diode Forward Characteristics
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STW20NC50
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
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Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STW20NC50
TO-247 MECHANICAL DATA
mm. MIN. 4.85 2.20 0.40 1 3 2 2 3 10.90 15.45 19.85 3.70 18.50 14.20 34.60 5.50 2 5 60 3.55 3.65 0.14 3 0.07 5 60 0.143 14.80 0.56 1.36 0.21 0.11 15.75 20.15 4.30 0.60 0.78 0.14 0.72 0.58 2.40 3.40 0.07 0.11 0.43 0.62 0.79 0.17 TYP MAX. 5.15 2.60 0.80 1.40 MIN. 0.19 0.08 0.015 0.04 0.11 0.07 0.09 0.13 inch TYP. MAX. 0.20 0.10 0.03 0.05
DIM. A D E F
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F1 F2 F3 F4 G H L L1 L2 L3 L4 L5 M V V2 Dia
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STW20NC50
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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